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bdash
added this pull request to stack #8610
October 1, 2026 17:11
`STADD`, `STCLR`, `STEOR` and `STSET` took their store size from the address register, so the 32-bit forms stored 8 bytes. `SWP` loaded into Rt before storing Rs, so it stored the loaded value when the two were the same register. It now loads into a temporary first, as the other atomics do.
The `SMAX`, `SMIN`, `UMAX`, `UMIN` and `ABS` cases lift the FEAT_CSSC scalar forms directly and lifted every other encoding as unimplemented, which skipped the ACLE intrinsic fallback. The Neon forms now lift to their intrinsics, such as `vminq_u32`, as other vector instructions do.
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Approving this. Just a couple of small recommended changes.
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Recommend updating this comment. It says that vector forms other than cnt "are left unimplemented", which is no longer the case.
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Recommend adding a test that demonstrates the register overlap that motivated the fix. Like swp x8, x8, [x8] for example.
- SWP loaded into Rt before storing Rs, so it stored the loaded value when the two were the same register.
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SMAX,SMIN,UMAX,UMINandABSwere unintentionally skipping the fallback to intrinsics for their vector forms.STADD,STCLR,STEOR, andSTSET) were using the size of the wrong operand for the store's size.SWPloaded into Rt before storing Rs, so it stored the loaded value when the two were the same register.